bokra kolo yegy 3ashan lagnet el e3temad
gaya we hatetkalem ma3ana fe 3elm bas
el hay3'eeb hayen2as daragteen we el
hayegy hay5od daragteen
Answer of q11 sheet 1
{filestream f=new filestream("path",fileMode.open,fileaccess.read);
streamreader sr=new streamreader(f);
string l=sr.readToEnd();
int chars,words,lines;
char[]linek={'\n'};
char[]wordk={ ' ' , ' , ' , ' . ' , ' ; ' , ' \n '};
string[]word=l.split(wordk );
string[]line=l.split(linek);
chars=l.Length;
words=word.Length;
lines=line.Length;
console.writeline("char:"+chars);
("words:"+words);
("lines:")+lines);
f.close();
sr.close();
}
GOODLUCK
streamreader sr=new streamreader(f);
string l=sr.readToEnd();
int chars,words,lines;
char[]linek={'\n'};
char[]wordk={ ' ' , ' , ' , ' . ' , ' ; ' , ' \n '};
string[]word=l.split(wordk );
string[]line=l.split(linek);
chars=l.Length;
words=word.Length;
lines=line.Length;
console.writeline("char:"+chars);
("words:"+words);
("lines:")+lines);
f.close();
sr.close();
}
GOODLUCK
حل ميد ترم السنه الي فاتت في الفيل طبعا
حل ميد ترم السنه الي فاتت في الفيل طبعا
http://www.4shared.com/document/9xYKVqki/fortf.html
http://www.4shared.com/document/9xYKVqki/fortf.html
System & Pattern Midterm Answer
System Analysis Midterm 2008-2009 Answer
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Pattern Recognition Midterm 2008-2009 Answer
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By : Eng. Manar
Very Thanks to her
Download Here
Pattern Recognition Midterm 2008-2009 Answer
Download Here
By : Eng. Manar
Very Thanks to her
Pattern Recognition Sheets
*-*-*-Pattern Recognition-*-*-*
Sheets 1,2,3 and Answers
Updated[15-4]
Sheet 1 + Answer
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Sheet 2 + Answer
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Sheet 3 + Answer
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new :Sheet 4 + Answers
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by : Eng. Manar
Sheets 1,2,3 and Answers
Updated[15-4]
Sheet 1 + Answer
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Sheet 2 + Answer
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Sheet 3 + Answer
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new :Sheet 4 + Answers
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by : Eng. Manar
by : Gebriel Mostafa
Consider a 32-bit processor, with 16-bit external data bus (in the following figure), Discuss the impact of Data Bus Width on the performance of that System
el instruction el wa7da 3ndna tolha 32 we el goz2 beta3 el data(el bus) 7agmo 16
ye3eni a5er 7agm lel word haishal feh 7agmo 16
bs el el cpu tool el word feeh 32?
aiwa ma hena el fekra
en e7na hantdar nene2el el klema 3la marteen
3shan ne3abey el 32 beto3 el word elkmla
we da tab3an bi5lei el cpu elperofrmance beta3o ye2el el nos
ye3eni enta maslan m3ak mobile men elli bisha3'al shar7teen bs lazm el owla tet2fel 3shan el tania teshta3'al fa da bi2lel men kodret el 100% enno yesha3'al shar7teen fe nafs el wa2t ella 50% 3shan howa bisha3'al shari7a wa7da bs at a time
we nafs el klam lel cpu howa bi3mel two bus cycle 3shan ye3ebi el 32 bel word kolha(bin2el el word 3la marteen) tab3an el 100% performance enno yen2leha fe marra wa7da we be ma enno bin2lha 3la marteen fa da bi2lel el performance beta3o le 50%
By : Gebriel Mostafa
Consider a hypothetical 24-bit processor machine having 24-bit instruction composed of 2 fields. The first 8 bits contains the opcode and the reminder an immediate operand or an operand address.
What is the maximum directly addressable memory space (in bytes)?
Kol instruction betb2a opcode we address
we hena 7add el opcode 8 yeb2a el address 7agmo 24-8=16
el opcode bib2a feeh noo3 el 3amlia (maslan darb aw gam3( we bib2a momsal be arkam)
el address bib2a feeh 3enwan el 3amlia de feen fe el memory(momsal be arkam bardo)
(nafs el fekra el fekra elli fe el so2al elli 2ablo)
3ndna 16 5ana 3shan yemlo el 3enwan
awl 3ewan maslan(el 3enwan bimosal be 3add binarey)
0000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0010
0000 0000 0000 0011
yeb2a e7na 3ndna 2^16 address momknieen we da the maximum
p.s. : el dr kan bidrbha ba3d ma netl3ha 2^16 fe 3 fatb2a =192kb
How many instructions can have that processor?
da m3nah kam 3amlia
el goz2 beta3 el opcode howa elli feeh noo3 el 3amlia
ye3eni 3la assaso bit7aded 3add el 3amlia
we kol 3amlia momasla be arkam
we howa hena 7agmo 8
yeb2a e7na ne2dar ne3mel 2^8 3amlia we aksa 7aga
yeb2a haishel 2^8
What is the maximum unsigned integer can be represented by that processor word?
edit :
aiwaaaa da ba2a nafs el fekra
e7na 3refna en 3add el 5anat el 3adadia lel instruction el momkna 24 5ana 3adadia lelinstruction kolha
8 lel opcode we 16 memorey
we e7na hena bentklem 3n el instruction kolha be opcodeha we be addressha
awl instruction haib2a kemtha maslan 0000 0000 0000 0000 0000 0000
bema enna bda2na el 3ad men el zero(ye3eni fe el ost3'omaia bi2lak 3ed le3ashra we bda2 men el sefr haib2a 25ro 9 3shan dool ba2o 10 thwani )
yeb2a el instruction el 25eer kemto[ (2^24) - 1 ]3shan da lama kol 5ana tegeb 2e5rha we el wa7ed nen2aso 3shan nafs fekret el 9 beta3et el ost3'omaia 3shan e7na bd2ana men el zero
How many bits are needed for the instruction register and memory address register?
da rage3 le ta3ref el IR=Instruction Register we el MAR=memorey address register
el mar betshel eh ???
betsheel el adress beta3 el 3amlia el gaya(instruction)
ye3ni to3tbar betshel el goz2 beta3 el address elli fe intruction
we el goz2 brta3 el address 3refna enno 16
yeb2a el mar betshel 6 3shan bardo el address beta3 el instruction bishel 16
el IR betshel noa3 el 3amlia
we no3 el 3amlia da bib2a mawgood fe el opcode
we el opcode 7agmha 8 3shan howa 2al keda fe el so2al
yeb2a el IR beyshel el opcode
ye3eni 7agmha zaiha ye3eni 8 bardo
By : Gebriel Mostafa
By : Gebriel Mostafa
Plz Revise Defintion in The First Malzma After Assembley
da Shar7 el so2al el ham beta3et madet el computer orginzation
fe form tany lelso2al ......Soon
Consider a hypothetical microprocessor generating a 16-bit address (for example, assume that
the program counter and the address registers are 16 bits wide) and having a 16-bit data bus.
1. What is the maximum memory address space that the processor can access directly if it is
connected to a “16-bit memory”?
With 16 bits to represent the memory address , there are 2^16
unique addressable locations.(since every bit represent a place , we keda 3ndna 16 5ana we betlaei yeb2a fe 3ndna 2 os 16 e7tmal aw 3enwan mo5tlef)
With 16-bit memory each location contains 2 bytes of data(since 16 bit = 2 byte).(kol 3nwan aw e7tmal feeh 2 byte{7agmo 2 byte} we betlaei yeb2a 3add el bytes haisawei 3add el 3anaween darb 2 ) Hence the total memory directly accessible by the processor is 2^16 locations X 2 bytes /location = 131,072 bytes or 128 k bytes.
2. What is the maximum memory address space that the processor can access directly if it is
connected to an “8-bit memory”?
With 8-bit memory each location contains 1 byte of data. Hence the total memory
directly accessible by the processor is 2^16
locations X 1 byte/location = 65,536 bytes
or 64 k bytes.
By Gebriel Mostafa
Plz Revise Defintion in The First Malzma After Assembley
da Shar7 el so2al el ham beta3et madet el computer orginzation
fe form tany lelso2al ......Soon
Consider a hypothetical microprocessor generating a 16-bit address (for example, assume that
the program counter and the address registers are 16 bits wide) and having a 16-bit data bus.
1. What is the maximum memory address space that the processor can access directly if it is
connected to a “16-bit memory”?
With 16 bits to represent the memory address , there are 2^16
unique addressable locations.(since every bit represent a place , we keda 3ndna 16 5ana we betlaei yeb2a fe 3ndna 2 os 16 e7tmal aw 3enwan mo5tlef)
With 16-bit memory each location contains 2 bytes of data(since 16 bit = 2 byte).(kol 3nwan aw e7tmal feeh 2 byte{7agmo 2 byte} we betlaei yeb2a 3add el bytes haisawei 3add el 3anaween darb 2 ) Hence the total memory directly accessible by the processor is 2^16 locations X 2 bytes /location = 131,072 bytes or 128 k bytes.
2. What is the maximum memory address space that the processor can access directly if it is
connected to an “8-bit memory”?
With 8-bit memory each location contains 1 byte of data. Hence the total memory
directly accessible by the processor is 2^16
locations X 1 byte/location = 65,536 bytes
or 64 k bytes.
By Gebriel Mostafa
Humanites-Managment
Dr. Lectures Version 2
They have some modifications(extra slides) but almost the same
Download Here
Dr. Lectures Version 2
They have some modifications(extra slides) but almost the same
Download Here
Announcement
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إجازة رسمية في الأكاديمية
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يوم لأحد 4-4-2010
إجازة رسمية في الأكاديمية
System Analysis Lectures - Updated Weekly
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Will be Updated Whenever there is a new lecture
Lecture 1: Inroduced By : SparkleNut91 : Download Here
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Lecture 6: Introduced By : Mohanad Mohammad : Download Here
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Will be Updated Whenever there is a new lecture
Lecture 1: Inroduced By : SparkleNut91 : Download Here
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Lecture 4: Inroduced By : SparkleNut91 : Download Here
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Lecture 6: Introduced By : Mohanad Mohammad : Download Here
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